Channel Length Dependent Bias-Stability of Self-Aligned Coplanar a-IGZO TFTs

Abstract

We report channel length L ( L ranging from 2 to 40 μm) dependence of the electrical stability of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). The a-IGZO TFTs employ a coplanar structure with a SiNx interlayer used to dope the source/drain regions. After application of positive gate bias stress (PBS), short-channel devices ( L = 2 μm) exhibit smaller threshold voltage shifts ( ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) compared to longer-channel devices ( L ≥ 4 μm). It is proposed that carrier diffusion takes place from the high carrier concentration regions under the SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">∞</sub> interlayer to the intrinsic channel region, thereby shifting the Fermi level closer to the conduction band. Higher Fermi levels mean less defect states available for carrier trapping - hence the small ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> in short devices under PBS.