An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression

Abstract

The demand for higher power efficiency and bandwidth is increasing as mobile devices keep enhancing its graphic computing and media processing capabilities. Current memory interfaces with single-wire signaling operate at 5Gb/s/pin [1] and 6Gb/s/pin [2] with the power efficiency of 17.4pJ/b/pin and 15.8pJ/b/pin, respectively. Mobile DDR memory I/O with differential signaling has better power efficiency of 6.4pJ/b/pin [3], and so does the prior dual-band interconnect (DBI) [4] with the efficiency of 5pJ/b/pin at 4.2Gb/s/pin for simultaneous bidirectional (SBD) mobile memory I/O interface. However, DBI's differential signaling is incompatible with existing standards, and it also occupies large die area for using differential transmission lines and an LC-oscillator for generating RF-carrier. To alleviate these concerns, we propose to use a Single-Transmission-Line DBI (STL-DBI) with the best figure-of-merit (FoM) defined as data rate per pin divided by the I/O-interface die area and power consumption.