Soft-Start Method With Small Capacitor Charged by Pulse Current and Gain-Degeneration Error Amplifier for On-Chip DC–DC Power Converters

Abstract

This paper proposes a soft-start method with the features of a small on-chip capacitor and start stability for dc–dc converters. During the soft-start process, a slowly and linearly ramped-up voltage reference is generated based on the principle of the small on-chip capacitor charged by an oscillator-controlled pulse current to replace the normal reference. Meanwhile, the switching frequency is also reduced so that the inductor current has more time to decay and massive inrush current can be avoided. However, in this way, the system may be unstable in that the bandwidth could not keep less than 1/7 of the reduced switching frequency. In this paper, an error amplifier (EA) with gain-degeneration is proposed to solve this problem. When the switching frequency is reduced, the gain of the EA is also reduced and the bandwidth becomes narrower accordingly. A dc–dc converter using the proposed soft-start method has been implemented with a 0.5- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex></formula> CMOS process. Experimental results show that a soft-start period of 600 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm s}$</tex></formula> is achieved with an on-chip capacitor of 15 pF. Furthermore, both the output voltage and inductor current rise smoothly without oscillation and overshoot during the startup process.