2004 · 10 citations · 2 references
EngineeringComputer EngineeringComputer ScienceEmbedded SystemsHardware-software Co-designLow-power DesignDigital Image ProcessingEnergy-efficient Mobile ComputingImage ProcessingLow-power Digital Circuit DesignMotion EstimationPower EstimationDatapath DesignGradient DescentMobile Video CodingOperating VoltagePower ConsumptionPower Consumption OptimizationSimd ArchitecturesVideo Compression
This paper describes a sub-mW motion estimation processor core for MPEG-4 video encoding. It features a Gradient Descent Search algorithm whose computation power is only 7 % of the conventional 1:4-subsampling search, producing higher picture quality. Another feature is an optimized SIMD datapath architecture to decrease a clock frequency and an operating voltage. It has been fabricated with CMOS 5-metal 0.18 um technology. The measured power consumption to process a QCIF 15 fps video is 0.4 mW under 0.85 MHz@1.0 V.
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A sub-mW MPEG-4 motion estimation processor core for mobile video application
Junichi Miyakoshi, Y. Kuroda, M. Miyama et al. · 2004 · 11 citations · Full text