Optimized sample planning for wafer defect inspection

Abstract

Increasing fab construction costs, shortening product life cycles, and eroding market prices have become critical realities for today's semiconductor manufacturers. Consequently, many semiconductor facilities are now facing increasing pressure to quickly reach and maintain profitability by achieving faster yield ramps and sustaining higher product yields, while concurrently keeping the operational costs to a minimum. Inherently, these goals are in constant conflict, and the problem of optimally allocating various types of defect inspection equipment in an advanced semiconductor manufacturing line can be complex. The optimal sampling requirements are also dynamic, and are dependent upon the process technology, the product operational phase, and the business environment.