Publication | Closed Access
An ultra-low-power physics package for a chip-scale atomic clock
54
Citations
4
References
2005
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureChip-scale Atomic ClockHardware SecurityClock RecoveryElectronic PackagingPower-aware DesignElectrical EngineeringPhysicsComputer EngineeringAtomic PhysicsPhysics PackageUltra-low-power Physics PackageMicroelectronicsLow-power ElectronicsSystem On ChipApplied PhysicsBeyond Cmos
We report the design and measured thermal and mechanical performance of an ultra-low-power physics package for a chip-scale atomic clock (CSAC). This physics package enables communications and navigation systems that require a compact, low-power atomic frequency standard. The physics package includes a unique combination of thermal isolation, mechanical stability and robustness, and small package volume. We have demonstrated temperature control at a nominal operating temperature of 75/spl deg/C in a room-temperature, vacuum ambient requiring only 7mW of heating power. This represents a power reduction of over two orders of magnitude compared to the lowest-power existing commercial technology and more than an order of magnitude improvement over other CSAC development efforts.
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