A high-resolution CMOS sigma-delta A/D converter with 320 kHz output rate

Abstract

A third-order switched-capacitor sigma-delta A/D converter is presented. The converter consists of three cascaded first-order sigma-delta modulators, and achieves 88 dB pk/rms S/(N+D) in a 160-kHz passband with a 10.24-MHz sampling rate. The high signal-to-noise ratio is maintained over this wide bandwidth by attenuating the quantization noise with a third-order noise-shaping function and a fourth-order comb decimation filter. A special autozeroed integrator with low pole error is required to achieve the 10.24-MHz sampling rate and high-order noise shaping simultaneously.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>