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Design considerations for low-voltage on-board DC/DC modules for next generations of data processing circuits
14
Citations
2
References
2002
Year
Unknown Venue
EngineeringVlsi DesignElectronic DesignComputer ArchitecturePower Electronic SystemsIntegrated CircuitsPower ElectronicsHardware SecurityElectronic PackagingPower-aware DesignPower Electronic Devices3D Ic ArchitectureElectrical EngineeringComputer EngineeringInterconnection ParasiticsHigher Integration DensityMicroelectronicsDynamic LoadsLow-power ElectronicsPower IcVlsi ArchitectureDesign ConsiderationsNext Generations
By reducing the power supply voltage, a higher speed, lower power consumption, and higher integration density of data processing ICs can be achieved. A variety of ICs operating from 3.3 V are available. Next generations of ICs are expected to work even with lower voltages, i.e., in the 1-3 V range, to further enhance their speed-power performance. At the same time, during transients these new generations of data ICs will present very dynamic loads with high current slew rates. As a result, they will require point-of-load power supplies in order to minimize the effects of the interconnection parasitics. These on-board power supplies will be derived from the existing voltages available in the system (usually 5 V or 12 V), and will be required to have high power densities, high efficiencies, and good transient performance. This paper presents design considerations for these on-board power supplies and discusses their performance limits imposed by various circuit and system parasitics.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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