A high-performance low power direct 2-D transform coding IP design for MPEG-4 AVC/H.264 with a switching power suppression technique

Abstract

This paper proposes a high-performance low-power direct 2-D transform coding IP design for H.264 with a switching power suppression technique. The proposed transform coding design not only suitably arranges the data sequences in row and column transforms to greatly increase the data processing rate but also takes advantage of the correlation existed in natural video sequences to suppress the spurious switching power. When compared with the parallel transform architecture (Wang, et al., 2003), this design possesses 4 times higher data processing rate (in terms of pixels/cycle) and 3.52 times higher throughput (in terms of pixels/sec) at the cost of 1.80 times hardware cost in computing the multi-transform for H.264. In addition, without voltage scaling, the power consumed by the proposed forward transform design is only 35% of that consumed by the forward transform design in (Wang, et al., 2003) to maintain the same throughput. When the proposed switching power suppression technique is applied, the proposed transform design can perform digital cinema video coding format by consuming only 1.86 mW.