Design, analysis, and transmission system performance of a 41 GHz silicon photonic modulator

TLDR

The authors design and characterize a slow‑wave series push‑pull traveling‑wave silicon photonic modulator. The 4‑mm‑long modulator achieves 38 GHz and 41 GHz –3 dB bandwidths at 2 V and 4 V reverse bias, and its energy consumption is estimated for various modulation schemes. Open eye diagrams are obtained up to 60 Gbps without processing and 70 Gbps with passive compensation; the device meets a hard‑decision FEC threshold of 3.8×10⁻³ at 112 Gbps over 2 km SMF with PAM‑4 and 5 km with PAM‑8.

Abstract

The design and characterization of a slow-wave series push-pull traveling wave silicon photonic modulator is presented. At 2 V and 4 V reverse bias, the measured -3 dB electro-optic bandwidth of the modulator with an active length of 4 mm are 38 GHz and 41 GHz, respectively. Open eye diagrams are observed up to bitrates of 60 Gbps without any form of signal processing, and up to 70 Gbps with passive signal processing to compensate for the test equipment. With the use of multi-level amplitude modulation formats and digital-signal-processing, the modulator is shown to operate below a hard-decision forward error-correction threshold of 3.8×10-3 at bitrates up to 112 Gbps over 2 km of single mode optical fiber using PAM-4, and over 5 km of optical fiber with PAM-8. Energy consumed solely by the modulator is also estimated for different modulation cases.