2002 · 37 citations · 4 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysMicroelectronicsDigital Logic DesignField-programmable Gate Array ArchitectureFpga ArchitectureLow-power Fpga DesignProgrammable Logic ControllersProgrammable Logic DevicesArea-efficient Fpga ArchitectureDigital Signal Processing Block ArchitectureDigital Signal Processing BlocksField-programmable Gate Arrays (Fpgas)Field-programmable Logic ArraysLogic OptimizationPipeline OrganizationVlsi Implementation
The authors describe the architecture of a fuzzy logic controller using a pulse-width-modulation (PDM) technique and a pipeline structure. Features of this controller are a new architecture for the inference unit, reduced chip area, variable resolution from 1, 2, 3,. . .,254, 255 and fewer input/output (I/O)-pins. Additionally, the architecture has an optimized rule base and its operation time depends only on the resolution. A prototype with two inputs, one output, and a resolution of 8 b has been implemented on field programmable gate arrays (FPGAs) and uses fewer than 10000 gates including internal RAM. A prototype of the controller operates at 6 MHz and needs 170- mu s by 8-b resolution or 22- mu s by 5-b resolution for one control step, independently of the number of inputs, outputs, and rules.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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L. A. Zadeh · Computer · 1988 · 1.8K citations
Analysis of a fuzzy logic controller
Walter Kickert, E.H. Mamdani · Fuzzy Sets and Systems · 1978 · 393 citations