A novel low power multiplexer-based full adder cell

Abstract

A novel low-power multiplexer-based 1-bit full adder cell that uses 12 transistors (MBA-12T) is presented here. MBA-12T is tested along with four other low-power 10-transistor 1-bit full adders that were shown to have more than 26% in power-savings over the conventional 28-transistor CMOS cell. The testing consists of simulating using HSpice under 6 frequencies, and 6 different loads. The testing result shows that the MBA-12T exhibits at least 23% in power-savings over the least power-consuming 10-transistor cell and a minimum of 64% in speed improvement.