A 1-V CMOS log-domain integrator

Abstract

A novel circuit implementation of a CMOS log-domain integrator is presented. Unlike most other implementations, it does not require placing of MOSFETs in separated wells, and therefore allows very compact filters, which are fully compatible with modern standard CMOS technologies. Besides the saving of chip area, this also helps to reduce parasitic capacitances. The most important advantage of this circuit is the very low minimum required supply voltage of only two saturation voltages plus one gate-to-source voltage of a weakly inverted MOSFET. This is fully compatible with the minimum required supply voltage of digital gates implemented in the same technology. The integrator was used as a building block for a 5th-order Bessel filter, which was simulated with the transistor parameters of a 0.5 /spl mu/m CMOS technology.