CORDIC and SVD implementation in digital hardware

Abstract

Singular Value Decomposition is classified among the most effective numeric methods of matrices inversion. The paper presents a study of hardware implementation of SVD and CORDIC algorithms. Various digital architectures were proposed and compared, including low-cost sequential and high-performance pipelined solutions. Fixed point and floating point arithmetic was considered. The concepts were implemented in VHDL, verified and synthesized with Xilinx tools. Selected approach was physically implemented and tested.