Publication | Closed Access
TLP characterization for testing system level ESD performance
13
Citations
1
References
2010
Year
Electrical EngineeringEngineeringHardware-in-the-loop SimulationMeasurementSoftware TestingComputer EngineeringComputer ArchitectureSystems EngineeringEducationTlp CharacterizationIec PerformanceCase StudyBiased Tlp AnalysisTest BenchInstrumentationPower System ProtectionDesign For Testing
A case study of system level ESD protection is presented for a scheme requiring compliance to the IEC 61000–4–2 standard. The behavior of the circuit was analyzed using TLP testing under biased conditions. Compared to the unbiased case, it was found that the response of the circuit becomes erratic at the lower current levels under the external bias leading to an unexpected early failure during the system level ESD test. Improving the triggering response of the ESD clamp to overcome this effect in the presence of an external bias greatly enhanced the system level ESD performance. The biased TLP analysis was found to be a useful tool to study the IEC performance.
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