Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic

Abstract

A bit-serial complex multiplier primitive is described, which uses distributed arithmetic to achieve significant computational savings over more conventional designs which decompose the complex multiply function into real multiply and add functions. Hardware is in the form of a modular, pipelined, cascadable linear array. Modularity ensures compatibility with automatic assembly procedures, which with its inherent testability properties makes the complex multiplier primitive an ideal addition to a cell library for silicon compilation. Component modules are identified and described, and estimates are made as to overall transistor count in static CMOS technology. Finally it is shown how a similar, reduced architecture may be used to compute more general sums of products.