2003 · 14 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignAnalog-to-digital Converter DesignDirect Digital SynthesisDynamic RangeFrequency SynthesisFrequency SynthesizersLow-power SynthesisPower ConsumptionPower Consumption Optimization
In this paper, a quadrature direct digital frequency synthesizer (DDFS) based on a new angle rotation algorithm is presented. It is shown that the proposed architecture features higher spectral purity,, reduced hardware cost, power consumption, and tuning. latency when compared to previously presented designs. The introduced DDFS produces 16-bit sine and cosine waveforms with a spurious free dynamic range (SFDR) of 114 dBc. The design was implemented using a 0.35 /spl mu/m CMOS technology. It occupies an area of 0.46 mm/sup 2/ and dissipates 115 mW at 3.3 V supply voltage and 100 MHz clock.
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