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Neural network based on a three-terminal ferroelectric memristor to enable on-chip pattern recognition

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2013

Year

Abstract

We demonstrate on-chip pattern recognition in a neural network circuit using a non-volatile memory for the first time. The synapse chip of the neural network consists of a stack of CMOS circuits and three-terminal ferroelectric memristors (3T-FeMEMs). By using the analog and non-volatile conductance change of the 3T-FeMEM as a synaptic weight, the matrix patterns are learned. Even when an incomplete pattern is input to the neural network circuit, it automatically recognizes the original pattern.