Embedded reconfigurable array targeting motion estimation applications

Abstract

Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for low-power and high-throughput implementations of motion estimators. This array is part of a heterogeneous SoC platform with multiple processors and computational elements. The embedded reconfigurable array targets multimedia and low-power system-on-chip applications, such as future mobile devices. We provide results which demonstrate a 75% reduction in power consumption in addition to improvements in timing and area over standard FPGA architectures.