A High Sensitivity Analog Front-end Circuit for Semi-Passive HF RFID Tag Applied to Implantable Devices

Abstract

A high sensitivity analog front-end is presented for semi-passive HF RFID tag for implantable devices. The design is compatible with the ISO/IEC 14443 Type-A. A rectifier with high power conversion efficiency is presented to provide stable rectified voltage. Novel tag system architecture with wake-up circuit is proposed to improve the sensitivity. Other Key circuits are studied and designed to make the system work effectively. Simulation results show that the AFE has realized much longer recognition distance than passive tags. Its sensitivity is -5.7 dBm and can work properly when the magnetic field is 0.3A/m. The AFE was fabricated with HHNEC 0.13 μm 1P4M CMOS technology with an area of 416 μm×472 μm. The AFE is also measured with FPGA based digital baseband. Measurement results show that the proposed AFE can support the 100% ASK demodulation and a modulation depth of 16.4%. The AFE can also accommodate a data rates from 106 Kbps to 848 Kbps are supported. Its power consumption is as low as 129.6 μW. This chip meets the demands of a semi-passive HF RFID tag and has great potential for implantable devices.