Comparative study on connected component labeling algorithms for embedded video processing systems.

Abstract

The objective of this paper is to carry out a detailed analysis of the most popular connected components labeling (CCL) algorithms for binary images. This study investigates their usability for processing streaming data and suitability for implementation using Field-Programmable Gate Array (FPGA) devices. The first part of this paper presents the state of the art on CCL algorithms. Both capability for real-time video processing as well as memory requirements are taken into consideration. The second part of the paper describes an efficient implementation of the single pass labeling algorithm using a Virtex-II Pro FPGA. It is verified on the development board with an infrared camera module as a real-time video source. The system is capable of processing video stream with 640 x 480 pixels per frame at a speed of 30 fps limited by the bandwidth of the video source.