Analysis and dimensioning of fully digital clock recovery for 112 gb/s coherent polmux QPSK systems - Concepedia

Concepedia

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Analysis and dimensioning of fully digital clock recovery for 112 gb/s coherent polmux QPSK systems

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2009

Year

Darko Zibar, A. Bianciotto, Zhe Wang, Antonio Napoli, Bernhard Spinnler

Technical University of Denmark, DTU Orbit (Technical University of Denmark, DTU)

Differential Group DelayRandom Jitter ToleranceDigital Clock RecoveryPolarization MixingClock RecoveryComputer EngineeringClock Synchronization

Abstract

Combined effect of polarization mixing and Differential Group Delay (DGD) on sinusoidal and random jitter tolerance is investigated. Requirements for tolerable DGD, loop bandwidth and loop delay are extrapolated.