CMOS oversampling ΔΣ magnetic-to-digital converters

Abstract

In this paper, two CMOS oversampling delta-sigma (/spl Delta//spl Sigma/) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) /spl Delta//spl Sigma/ modulator. The second one directly uses the MOP to realize a first-order SC /spl Delta//spl Sigma/ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-/spl mu/m CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least /spl plusmn/100 mT. The gain errors within /spl plusmn/100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 /spl mu/T for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.