Memory technology for the post CMOS era

Abstract

One of the tasks of the International Technology Roadmap for Semiconductors (ITRS) Emerging Research Devices (ERD) Technology Working Group (TWG) is to seek out memory technologies presented in the research literature and weigh whether they have the potential to serve in 22-nm and smaller IC generations. The motive for this effort is to develop data that can help guide research investment decisions. In 2004, the ERD TWG summarized some quantitative attributes of four alternative memory approaches, and developed a potential/risk score for each. While this effort falls far short of identifying a specific technology, it is at least a beginning. This article describes the nature of the challenge and reports initial study results.