2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2005 · 12 citations · 1 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignAnalog Integrated CircuitsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationClock JitterCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Logic CircuitsJitter CompensationJitter ToleranceLow-voltage Cmos DesignSensitivity
A fully integrated OC-192 multi-rate (9.95Gb/s-10.71Gb/s) receiver uses standard 0.18/spl mu/m CMOS. The circuit consists of an input amplifier, CDR, 1:16 demux and 18 LVDS drivers. The chip exceeds SONET jitter tolerance spec by >100%. Recovered 10Gb/s clock jitter is <4mUl(rms). The input sensitivity is <50mV with 870mW at 1.8V.
1
Fully-integrated SONET OC48 transceiver in standard CMOS
Afshin Momtaz, Jun Cao, M. Caresosa et al. · 2002 · 19 citations
Engineering, Computer Engineering, Electrical Engineering +17