Network Processor Load Balancing for High-Speed Links

Abstract

While transmission rates already achieve speeds beyond 40 Gb/s, today's network processors are only slowly approaching 10 Gb/s. In this paper we present a load-balancing scheme that enables system designers to bridge the performance gap using multiple slower NPs in parallel to serve high-speed links. The proposed scheme works in a flowpreserving manner to ensure in-sequence packet delivery as well as local validity of connection state information, while avoiding inter-processor communication. The effectiveness of the algorithms is evaluated by simulation with extrapolated workloads, and the impact of specific parameters on system performance is the subject of a factor-relevance analysis.