A 60 GHz 64-element wafer-scale phased-array with full-reticle design

Abstract

This paper presents the first large-scale wafer-scale phased-array at 60 GHz with 64-elements spaced λ/2 apart and occupying a full reticle area of 2.2×2.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The transmit array includes high-efficiency on-wafer antennas, 3-bits amplitude and 5-bits phase control on each element, and a highly redundant RF distribution network for improved yield. It also includes redundant SPI control and power strips, also for improved yield. The 64-element array results in a half-power beamwidth of 12.5° in the E- and H-planes, a directivity of 23 dB and scans to +/- 55° in the E- and H-planes with near-ideal patterns and a cross-polarization level of >-25 dB. The measured EIRP is 38 dBm at 66 GHz, but this is currently being redone for improved accuracy. To our knowledge, this is the largest single-chip phased-array ever developed and paves the way to mm-wave large-scale (1000+ elements) phased-array systems.