2004 · 13 citations · 5 references
EngineeringCommunicationElectrical EngineeringAnalog ElectronicsDigital CommunicationLow-power DesignAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingDistortion AnalysisMixed-signal Integrated Circuit DesignAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersCmos Analog Integrated CircuitsEqualizationHigh-speed Cmos Design
High-speed high-resolution analog-to-digital converters (ADC) are one of the major bottlenecks in digital communication systems. This work investigates the ADCs bit requirements for wired communication applications and presents an efficient partial analog equalization approach to improve the performance of the front-end ADC by 2-3 bits. The proposed partial analog equalizer along with a 6-bit 400-MHz flash ADC consumes 106 mW of power with 34-dB SNDR in a 0.18-/spl mu/m CMOS process. For a 400-Mb/s data transmission over a 240-m coaxial channel, experimental results show an error performance improvement equivalent to an 8-bit ADC system.
5
An 8-bit 150-MHz CMOS A/D converter
Yun-Ti Wang, B. Razavi · 2003 · 143 citations
Engineering, Computer Engineering, Electrical Engineering +17