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A 4.7mW 89.5dB DR CT complex ΔΣ ADC with built-in LPF

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References

2005

Year

Abstract

A CT complex /spl Delta//spl Sigma/ ADC with built-in LPF is presented. A modified feedback topology is used to improve robustness to interferers near f/sub g//2 or f/sub s/. Adding programmable gain control, the 0.18 /spl mu/m CMOS ADC achieves 89.5dB DR in a 1MHz BW, consuming 4.7mW from a 1.8V supply.

References

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