Publication | Closed Access
Flip-flop selection technique for power-delay trade-off [video codec]
28
Citations
2
References
2003
Year
Unknown Venue
Electrical EngineeringF/f BlendingConventional DesignVlsi DesignEngineeringVideo Coding FormatMixed-signal Integrated CircuitFlip-flop Selection TechniqueComputer EngineeringComputer ArchitectureDigital Circuit DesignMicroelectronicsLp-dct Consumes 24Signal ProcessingAnalog-to-digital Converter
Circuit and design techniques trade off power, delay, and area of a chip by blending different types of flip-flops with different merits: F/F blending. Three types of discrete cosine transform (DCT) blocks for MPEG-4 video codec, a conventional design (Conv-DCT), a low-power design (LP-DCT), and a high-speed design (HS-DCT), are fabricated in a 0.3 /spl mu/m CMOS technology. LP-DCT consumes 24%-51% less power without speed degradation, and HS-DCT operates 25% faster than Conv-DCT.
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