A discrete-time Bluetooth receiver in a 0.13μm digital CMOS process

K. Muhammad, Dirk Leipold, Y.-C. Ho, Chih-Ming Hung, K. Maggio, C. Fernando, T. Jung, J. Wallberg, Jinseok Koh, Samuel John,

2004 · 111 citations · 3 references

Concepts

Abstract

A discrete-time receiver architecture for a wireless application is presented. Analog signal processing concepts are used to directly sample the RF input at Nyquist rate. Maximum receiver sensitivity is -83dBm and the chip consumes a total of 41mA from a 1.575V internally regulated supply. The receiver is implemented in a 0.13/spl mu/m digital CMOS process.

References

3