Publication | Closed Access
FPGA SoC architecture and runtime to prevent hardware Trojans from leaking secrets
16
Citations
7
References
2015
Year
Unknown Venue
Hardware TrojanEngineeringInformation SecurityComputer ArchitectureFpga Soc ArchitectureConfidential ComputingEmbedded SystemsSoftware AnalysisHardware SecurityTrusted Execution EnvironmentSecure ComputingHardware Security SolutionComputer EngineeringHardware TrojansComputer ScienceHardware Abstraction LayerData SecurityCryptographySoftware Security
Hardware Trojans compromise security by invalidating the assumption that hardware provides a root-of-trust for secure systems. We propose a novel approach for an FPGA system-on-chip (SoC) to ensure confidentiality of trusted software despite hardware Trojan attacks. Our approach employs defensive techniques that feature morphing on-chip resources for moving target defense against fabrication-time Trojans, onion-encryption for confidentiality, and replication of functionally-equivalent variants of processing elements with arbitrated voting for resilience to design-time Trojans. These techniques are enabled by partial runtime reconfiguration (PRR) and are managed by a hardware abstraction layer (HAL) that reduces developer burden. We call our approach the Morph Onion-encryption Replication PRR HAL, or MORPH. MORPH aims to provide a stable interface for embedded systems developers to use in deploying applications that are resilient to hardware Trojans.
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