Publication | Closed Access
System-level HW/SW co-simulation framework for multiprocessor and multithread SoC
14
Citations
11
References
2005
Year
Unknown Venue
EngineeringComputer ArchitectureSystem-level DesignSimulationCo-simulationLegacy CHardware ArchitectureSystems EngineeringReal-time ApplicationModeling And SimulationParallel ComputingMultithread SocReal-time Operating SystemComputer EngineeringSoftware SimulationComputer ScienceReal-time ComputingDistributed SimulationHardware EmulationProgram AnalysisSimulation InfrastructureParallel ProgrammingSystem Software
C/C++-based languages such as SystemC or SpecC can be used for both hardware and software description by raising the level of abstraction for hardware. This paper proposes techniques for fast and accurate high-level co-simulation for multithread and multiprocessor SoC design using SystemC for hardware and legacy C with RTOS (real-time operating system) API for software. Automatically modified legacy C synchronizes with SystemC clock events, and communicates with other modules through IO (input/output) variables and transaction level bus models. Generic RTOS scheduler and POS1X APIs are also provided for the real-time application. About three times faster co-simulation speed than the ISS-based co-simulation along with various profiling data with 95% accuracy were achieved.
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