Concepedia

Abstract

The continual increase in microprocessor transistor densities has led to major challenges in on-chip temperature management. Examining how emerging architectural paradigms scale from a thermal-aware design perspective is critical for sustaining high-performance computing. In this paper we explore a novel dynamic thermal management technique for simultaneous multithreaded processors. Unlike prior studies, rather than testing general-purpose thermal management techniques applicable to all processor paradigms we propose to take advantage of SMT’s unique flexibility of having multiple threads. By selectively managing the execution of available threads we see an opportunity to adaptively counteract and prevent hot spots. Our work uses the Turandot simulator to model an SMTsupporting POWER5-like processor and the HotSpot 2.0 tool to simulate thermal behavior. With it, we examine the performance of our SMT-specific adaptive thread control mechanisms as compared to conventional dynamic thermal management techniques. We find that when multiple heterogeneous programs are available in the workload, thermal-aware issue policies provide a significant power-performance benefit; they average 44% ED reduction when aggressively operating near the thermally limited region. We observe the inherent tradeoffs between such performance advantages and thread fairness, and test this design as an instruction fetch policy as well as an adaptive register renaming technique.

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