A continuous-time ΣΔ ADC with increased immunity to interferers

Abstract

Receivers are being digitized in a quest for flexibility. Analog filters and programmable gain stages are being exchanged for digital processing at the price of a very challenging ADC. This paper presents an alternative solution where the filter and pro- grammable gain functionality is integrated into a ADC. The novel filtering ADC is realized by adding a high-pass feedback path to a conventional ADC while a compensating low-pass filter in the forward path maintains stability. As such, the ADC becomes highly immune to interferers even if they exceed the maximum al- lowable input level for the wanted channel. As a consequence, the ADC input range can be programmed dynamically to the level of the wanted signal only. This results in an input-referred dynamic range of 89 dB in 1-MHz bandwidth and an intentionally mod- erate output signal-to-noise-and-distortion ratio of 46-59 dB (de- pending on the programmed gain). The merged functionality en- ables a better overall power/performance balance for the receiver baseband. The design consumes less than 2 mW and active area is 0.14 mm in a 0.18- m digital CMOS technology.