High-performance RF/mm-Wavefront ends often require in situ sensing circuitries to monitor performance metrics and drive their built-in-self-test (BiST) algorithms for performance recovery or optimization. In large-scaled integrated phased-arrays, antenna coupling often results in dynamic beam-dependent impedance variations [antenna voltage standing wave ratio (VSWR)] and front-end degradation, necessitating in situ load-invariant power/impedance sensors. However, the state-of-the-art mm-Wave sensors only demonstrate sensing at a single frequency, instead of the entire frequency band of interest with limited accuracy over antenna VSWR. Therefore, we propose a broadband current/voltage sensing-based VSWR resilient true power/impedance sensor supporting single-ended interfaces using the GlobalFoundries 45 nm CMOS SOI process. Comprehensive theoretical analyses of the coupling mechanisms and analog multiplier architectures are presented. Sources of error for power sensing are highlighted in detail. At 34 GHz, the proposed sensor measures the power sensing error

$(\text {PSE}) \le \pm 1$

dB for 3:1 VSWR and ±0.5 dB for 2:1 VSWR. Over 22–41 GHz, the measured PSE is

$\le \pm 3.4$

dB for 3:1 VSWR and ±1.5 dB for 2:1 VSWR. In addition, the proposed sensor under a 50

$\Omega $

load demonstrates a maximum dynamic range of 22.89 dB at 42 GHz and a dynamic range

$>21.46$

dB over 27–41 GHz. At 33 GHz, the measured

$\vert \Gamma \vert /\angle \Gamma $

errors are

$\le 0.072$

/7.3° for 3:1 VSWR and

$\le0.04$

/7.13° for 2:1 VSWR, while demonstrating

$\vert \Gamma \vert /\angle \Gamma $

errors of

$\le 0.2$

/34° for 3:1 VSWR and

$\le 0.11$

/27° for 2:1 VSWR over the entire 27–41 GHz BW. The chip die occupies an area of 0.97

$\times1.99$

mm and a sensor core area of 0.48

$\times1.66$

mm.

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