TSA-Net: Tube Self-Attention Network for Action Quality Assessment

Shunli Wang, Dingkang Yang, Peng Zhai, +2

16.2 A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine

Shiwei Liu, Peizhe Li, Jinshan Zhang, +7

Artificial IntelligenceLarge Ai ModelAi ArchitectureEngineeringMachine Learning +8

COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning

Haozhe Zhu, Bo Jiao, Jinshan Zhang, +13

2022 IEEE International Solid- State Circuits Conference (ISSCC)

EngineeringMachine LearningEdge DeviceComputer ArchitectureEmbedded Systems +19

Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR

Tianli Zhang, Yuefeng Cao, Shumin Zhang, +3

High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion

Danfeng Zhai, Wenning Jiang, Xinru Jia, +7

IEEE Transactions on Circuits and Systems I Regular Papers

EngineeringCalibrationData ConverterAnalog DesignInterleaved Adcs +11

A 4T2R RRAM Bit Cell for Highly Parallel Ternary Content Addressable Memory

Xuehong Wang, Linfang Wang, Wang Ye, +13

IEEE Transactions on Electron Devices

Non-volatile MemoryElectrical EngineeringMatch CellEngineeringConventional Two-transistor-two-resistor +12

OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators

Chixiao Chen, Hongwei Ding, Huwan Peng, +8

EngineeringMachine LearningComputer ArchitectureRecurrent Neural NetworkSpeech Recognition +14

HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer

Shiwei Liu, Chen Mu, Hao Jiang, +6

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

A High-Linearity Pipelined ADC With Opamp Split-Sharing in a Combined Front-End of S/H and MDAC1

Zhenyu Wang, Mingshuo Wang, Weiru Gu, +3

IEEE Transactions on Circuits and Systems I Regular Papers

Combined Front-endSample/hold CircuitOpamp Split-sharingData ConverterAnalog Design +7

A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS

Yuefeng Cao, Shumin Zhang, Tianli Zhang, +5

IEEE Transactions on Circuits and Systems I Regular Papers

Digital Calibration EngineEngineeringCalibrationData ConverterAnalog Design +9